1. Field of the Invention
The present invention relates to semiconductor integrated circuits containing memory arrays, and particularly those arrays incorporating redundancy, and more particularly, for certain embodiments, those having a three-dimensional memory array.
2. Description of the Related Art
Integrated circuit memory arrays have frequently included redundant elements, such as rows and columns, which can be used to replace one or more defective elements. For example, a defective memory cell may be replaced by replacing either the row or the column containing the defective memory cell with a spare (i.e., redundant) row or column. Certain memory array technologies and architectures are more suitable for implementing redundant or spare rows than redundant columns, and others are more suitable for implementing spare columns than rows.